version b.1.0 mar..2012 ? jmicron 2012. all rights reserved. page 2 copying prohibited. JMF662 JMF662 sata iii to flash controller overview JMF662 is a single chip, supports external sdram, s ata iii to nand flash interface. it is native desig n to provide higher bandwidth for flash memory access. JMF662 can support the maximum read and write speed to drive the limit of flash memory. JMF662 has the best supporting to the latest nand flash memory, includi ng toshiba 32nm/24nm hbl/abl flash. it also provide s the embedded hardware error correction code (ecc), wear leveling, and bad block management technology in t his chip. in order to resolve compatibility issue, JMF662 provid es the on line firmware upgrade ability. JMF662 provides embedded processor, internal masked rom, data sram, sata link/transport layer, sata ph y. data swap between different interfaces can be done very efficiency by dma without cpu involvement. based on the efficient architecture, the JMF662 can provide the best perfo rmance. features compliance compliant with serial ata international organizati on: serial ata revision 2.6. satai\ii supports 1-port 1.5/3.0/6.0gbps sata i/ii/iii inte rface. cpu embedded data buffer. 32bits embedded processor. 32 kbytes embedded masked program rom. 128 kbytes embedded system ram. flash support maximum 16ces flash per channel. support 32/24 nm flash. support legacy/toggle mode flash enhanced endurance by dynamic/static wear-leveling . supports 4k/8k/16k bytes page size. supports dynamic power management. smart (self-monitoring, analysis and reporting tec hnology). data integrity under power-cycling. supports online sata firmware update. www.datasheet.co.kr datasheet pdf - http://www..net/
version b.1.0 mar..2012 ? jmicron 2012. all rights reserved. page 3 copying prohibited. JMF662 supports bch 8/16/24/40 bits ecc. support shift read feature of nand flash when ecc fail sdram support ddr2 support 512mbits to 2gbits system integrated sata iii port and 8-channels flash cont roller. led indicator for sata read/write access. led indicator for sata phy link up. provides 14 gpio pins for customer. provides uart and jtag for s/w debugging. built-in power-up self-test (bist). manual and automatic self-diagnostics. provides voltage low detect interrupt. 399-ball tfbga package firmware support ncq on this controller. support lba24 & lba48 on this controller. support 1/2/4/8 banks selected free. support 4/8 channels selected free. www.datasheet.co.kr datasheet pdf - http://www..net/
version b.1.0 mar..2012 ? jmicron 2012. all rights reserved. page 4 copying prohibited. JMF662 block diagram figure 1: JMF662 block diagram total capacity table 1: JMF662 total capacity table density/per flash support ce pins/per flash maximum flash number total capacity 1g x 8 bits (8gb) 1 ce pin 32 32g bytes 2g x 8 bits (16gb) 1 ce/ 2 ce pin 32 64g bytes 4g x 8 bits (32gb) 1 ce/ 2 ce pin 32 128g bytes 8g x 8 bits (64gb) 2 ce pin 32 256g bytes 16g x 8 bits (128gb) 4 ce pin 32 512g bytes www.datasheet.co.kr datasheet pdf - http://www..net/
version b.1.0 mar..2012 ? jmicron 2012. all rights reserved. page 5 copying prohibited. JMF662 product information name description JMF662 sata ii to flash controller document 1 JMF662 data sheet 2 JMF662 design specification 3 JMF662 hardware design guide 4 JMF662 hardware schematic contact information department email sales sales@jmicron.com tech.support fae@jmicron.com www.datasheet.co.kr datasheet pdf - http://www..net/
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